RCU Forums - View Single Post - Walkera/Dragonfly/Esky 4ch transmitter/receiver technical review.
Old 03-31-2005 | 12:34 PM
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tnd2000
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Default RE: Walkera/Dragonfly/Esky 4ch transmitter/receiver technical review.

I've been doing machine programming for 10+ yrs. Programmed a microcontroller that monitors fuel flow for oil company. Had one of the first generation computer KIT that was on a breadboard which was programmed via ML code only (yea this was almost 30+ yrs old). Done work wiring/programming an 8086 to play guess my number on another's school project. + more.

As far as FMS goes, I own 1 zhen hua tx, 1 eksy tx, 1 optic 6. I can see the 4 ch on the zhen hua. Also observe the ccpm mixing on the esky which is also the reason every1 with esky radio can't using fms with the tx because ccpm mixing throw fms completely off.

For the optic 6, there are many more switches but it's only a 6 ch radio.
Take the throttle for example, I have the analog input from the stick, 2 digital trim and 2 digital sub trim buttons and another analog input for throttle adjustment. Let's forget about the trims, just from the analog inputs, it means 2 of the processor's i/o lines are used as a/d to read the pots. This does not mean it's 2 channels, or 4 if u include the trims, rather it's reading all the values of the i/o lines and combining them into 1 channel. This is what I was trying to get at earlier. All those extra i/o should not be extra channels but rather the processor combines them into 4 channels.

No offense taken, I know how it is. It is not possible, nor is this the right place, to fully describe how microcontroller and all those thing works in this forum.

I looked at your graph from the scope, it's not conclusive prove it's 12 channels. If it is indeed serializing the channels, then you forgot about the synchronizing pulse or start/stop bit. If the timing of the tx/rx was off, and rx started reading at pulse 3, it means it's reading the roll as throttle.

8 bits referring to the size of the register aka amount of data it can process per cycle. the 8088 cpu from PC/XP was a 16 bit cpu with 20 address bits but only 8 i/o lines (data bus). The i/o are muxed with the address lines. 8086 was the same but it used 16 i/o lines. Damn sorry I said we shouldn't discuss this on this forum and here I'm still doing it.[:-]